From eab803cb2bf6e005624dc608a629f50443592404 Mon Sep 17 00:00:00 2001 From: Keir Fraser Date: Wed, 28 Jan 2009 17:05:18 +0000 Subject: [PATCH] x86: VCPU structure must reside below 4GB, since it contains embedded PAE mode PDPTEs. Signed-off-by: Keir Fraser --- xen/arch/x86/domain.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 3f8f973b4c..1ee5482b96 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -165,14 +165,21 @@ void dump_pageframe_info(struct domain *d) struct vcpu *alloc_vcpu_struct(void) { struct vcpu *v; - if ( (v = xmalloc(struct vcpu)) != NULL ) + /* + * This structure contains embedded PAE PDPTEs, used when an HVM guest + * runs on shadow pagetables outside of 64-bit mode. In this case the CPU + * may require that the shadow CR3 points below 4GB, and hence the whole + * structure must satisfy this restriction. Thus we specify MEMF_bits(32). + */ + v = alloc_xenheap_pages(get_order_from_bytes(sizeof(*v)), MEMF_bits(32)); + if ( v != NULL ) memset(v, 0, sizeof(*v)); return v; } void free_vcpu_struct(struct vcpu *v) { - xfree(v); + free_xenheap_pages(v, get_order_from_bytes(sizeof(*v))); } #ifdef CONFIG_COMPAT -- 2.30.2